Hi guy, i post my optimised _satb_update routine .
As it use self modifying code ,it must be used for CD projects only .
#asm
_satb_update:
; // Use TIA, but BLiT 32 words at a time (64 bytes)
; // Because interrupt must not deferred too much
; // 8 sprites at a time
stw #_satb , .vram_tia_satb + 1 ; // Source
; // Set VRAM destination address
st0 #0
st1 #$00
st2 #$7F
; // Enable VDC write mode
st0 #2
ldx #8
.vram_tia_satb:
tia $0000 , $0002 , $40
addw #$40 , .vram_tia_satb + 1
dex
bne .vram_tia_satb
rts
#endasm
i can post a rom version if someone is interested .
Thanks :-)
I would like to take a peek at the ROM version if you want to post it, too :-)
Quote from: Debvgger_ on 05/07/2015, 05:41 PMI would like to take a peek at the ROM version if you want to post it, too :-)
Ok no problem ;-)
#asm
_satb_update:
; // Use TIA, but BLiT 32 words at a time (64 bytes)
; // Because interrupt must not deferred too much
; // 8 sprites at a time
; // set source,destination and size for executing tia in RAM
stw #_satb , _ram_hdwr_tia_src ; // Source
stw #$0002 , _ram_hdwr_tia_dest ; // Destination
stw #$40 , _ram_hdwr_tia_size ; // Size
; // Set VRAM destination address
st0 #0
st1 #$00
st2 #$7F
; // Enable VDC write mode
st0 #2
ldx #8
.vram_tia_satb:
jsr _ram_hdwr_tia
addw #$40 , _ram_hdwr_tia_src
dex
bne .vram_tia_satb
rts
#endasm
All _ram_hdwr_tia variables are already declared in huc (in library.asm)
Ahhhhhh .... It always warms my heart to see self-modifying code! :)
elmer: Me too; as I always say, damn caches :lol:
LOL, CPU's cache is the evil :evil: