Sega Lord X reviews the Street Fighter II Champion Edition PC Engine port.
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Messages - TailChao

#1
Guess I'll answer my own question.

IMG

Looks like my guess above was correct. Below is some more info about the tap :
    Rising Edge of CLR resets the TurboTap and selects Controller 1.
          |
          V
          ___                                                  ___
CLR  ____/  \_________________________________________________/  \___ ...
      ____________    ___    ___    ___    ___    _________________
SEL              \___/  \___/  \___/  \___/  \___/                  ...

                      ^
                      |
    If CLR is still high on the Rising Edge of SEL, Controller 1 will remain
    selected and SEL1 will just toggle. So the Rising Edge of CLR resets the
    tap and the first controller will remain selected until it lowers.

      ____            _________________________________________
CLR1      \___________/                                        \_______ ...
      ____________    _________________________________________________
SEL1              \___/                                                  ...
      ________________        _________________________________________
CLR2                  \_______/                                          ...
      ____________________    _________________________________________
SEL2                      \___/                                          ...
      ________________________        _________________________________
CLR3                          \_______/                                  ...
      ____________________________    _________________________________
SEL3                              \___/                                  ...
      ________________________________        _________________________
CLR4                                  \_______/                          ...
      ____________________________________    _________________________
SEL4                                      \___/                          ...
      ________________________________________        _________________
CLR5                                          \_______/                  ...
      ____________________________________________    _________________
SEL5                                              \___/                  ...


After ten edges on SEL, the tap will deselect all controllers. I've seen claims that repeatedly toggling SEL after this will either cause the tap to wrap around or just stop reading and output "0000" - I've gotten both behaviors to occur and can't find a pattern for either. So my guess is that the intended behavior was the tap should stop reading after ten toggles of SEL but this doesn't work right so don't depend upon it in any software.
#2
I'm trying to read the state of multiple six-button controllers through a TurboTap. Unfortunately I don't own any of these controllers nor could find any information on how this is supposed to work.

Avenue_Pad_6_Schematic.png
Based upon this six button schematic, and these TurboTap notes I'm guessing you'd do the following :

1) Start with SEL high and CLR low.
2) Raise and lower CLR to reset the turbotap.
3) Read in all five controllers' data by toggling SEL ten times...
3a) IFF the controllers' data are all low when SEL is high, THEN this is a six button controller. We can assume the data pulled in when SEL is low will be the extra buttons' states.
3b) IFF the controllers' data were all low when SEL was high previously - but aren't now, THEN this is a six button controller and we're pulling in the "default" button set.
3b) IFF the controllers' data are never all low when sel is high, THEN this is definitely a two button controller.
4) Repeat steps 2-3 a second time to identify and fetch the other half of the data for any six button controllers.

Any help would be appreciated.

Edit : Made signal names a little more clear.
#3
Quote from: guest on 02/21/2018, 11:56 AMHeh, that's pretty neat.  Looks like a relatively clean install and I'm surprised you can fit all those kangaroos in.
I was considering putting a System Card 2.0 in there so it'd be just like owning a Duo except worse, but the kangaroos are a way better resident. Best option is probably to install Magical Chase and flip the thing on eBay so I can buy a few cars.

Anyway, TurboGrafx is all put back together.

No game inserted gives you Kangaroo Mans '94.
IMG

Putting a card in will run that instead.
IMG

CD Stupid Cards and rare sharpie-edition games are still fine.
IMG
#4
I was doing some rework on my TurboGrafx and decided to poke around at the unpopulated chip pads for IC107 and IC108 near the HuCard slot.

I've seen literature claiming these may have been intended for a built-in game. But after tracing back the pinout of both chips it looks more like IC107 was just supposed to contain a small instruction screen which is displayed when you start the console without a card (like the Master System). IC108 controls the mapping, and probably was just supposed to obfuscate the address line mapping of IC107 to make it more difficult to install stolen software.

But that's just a guess.

Anyway, with some work we can install our own built-in game up to 8 MEGA POWER in size. What we're going to do is adapt the original socket to hold a 27C801 compatible chip and add a small circuit to activate this ROM if and only if a HuCard isn't inserted. I'd rate this at moderate difficulty if you'd like to try, i.e. you should have some basic electronics knowledge and steady hands.

Let's do some soldering.

Here's the pinout for IC107 :
                IC107
              _____ _____
        VCC | 1  v  32 | VCC
        OEn | 2      31 | R139 *
        GND | 3      30 | GND
        GND | 4      29 | GND
 ** IC108,18 | 5  2  28 | GND
 ** IC108,19 | 6  3  27 | IC108,17 **
 ** IC108,20 | 7  C  26 | IC108,16 **
 ** IC108,21 | 8  1  25 | GND
 ** IC108,22 | 9  0  24 | GND
          A2 | 10  0  23 | GND
          A1 | 11  0  22 | IC108,15 **
          A0 | 12  E  21 | D7
          D0 | 13    20 | D6
          D1 | 14    19 | D5
          D2 | 15    18 | D4
        GND | 16    17 | D3
            |___________|

  * R139 isn't populated, so this is NC'd.
    Looks like it was just supposed to be a pullup.

 ** IC108 isn't populated, so these are NC'd.


We need to modify it like this :
                                        IC107
                                      _____ _____
              *** A19 (HuCard Pin 3) | 1  v  32 | VCC
              *** A16 (HuCard Pin 4) | 2      31 | A18 (HuCard Pin 33)
              *** A15 (HuCard Pin 5) | 3      30 | A17 (HuCard Pin 32) ***
              *** A12 (HuCard Pin 6) | 4      29 | A14 (HuCard Pin 31) ***
  **** A7 (HuCard Pin 7) <- IC108,18 | 5      28 | A13 (HuCard Pin 30) ***
  **** A6 (HuCard Pin 8) <- IC108,19 | 6  2  27 | IC108,17 -> A8 (HuCard Pin 29)
  **** A5 (HuCard Pin 9) <- IC108,20 | 7  7  26 | IC108,16 -> A9 (HuCard Pin 28)
 **** A4 (HuCard Pin 10) <- IC108,21 | 8  C  25 | A11 (HuCard Pin 27) ***
 **** A3 (HuCard Pin 11) <- IC108,22 | 9  8  24 | OEn (HuCard Pin 26) ***
                                  A2 | 10  0  23 | A10 (HuCard Pin 25) ***
                                  A1 | 11  1  22 | IC108,15 -> GAME_CSn
                                  A0 | 12    21 | D7
                                  D0 | 13    20 | D6
                                  D1 | 14    19 | D5
                                  D2 | 15    18 | D4
                                GND | 16    17 | D3
                                    |___________|

  *** Original trace must be cut.

 **** You can also just reconnect these address pins on IC108's pad.
      A7 == IC108,18 -> IC108,64
      A6 == IC108,19 -> IC108,63
      A5 == IC108,20 -> IC108,62
      A4 == IC108,21 -> IC108,61
      A3 == IC108,22 -> IC108,60

The circuit to enable the internal game (GAME_CSn) when a card isn't inserted can be two NAND gates using A20 (HuCard Pin 24) and CARDn (HuCard Pin 1).
GAME_CSn = !(!(A20 & A20) & CARDn)

This can be implemented with a single 74LS00. Below are two photos of my board to give an idea of how much stuff you'll have to add.

IMG
IMG

Keep in mind some of the patch wires here are for different repairs or from when I was reverse engineering stuff. Basically, doing this won't make such a huge mess.
#5
I've decided to publicly release the Watara SuperVision emulator I've had sitting around. Now you can learn about another 65c02 cousin to the PC-Engine, or just unpack it then throw the emulator in the trash (just like a real SuperVision).

IMG

It also includes a little hardware test program to help fix broken units and confirm the weird behavior of the scrolling registers.

Only the STANDARD mapper is supported right now. I was hoping to get MAGNUM emulated, but I don't own that hardware variant nor a copy of "Journey to the West." The price on this garbage actually went up on eBay, and I'm not interested in paying it nor inviting more ancient hardware into my apartment.

Note that when loading ROMs the emulator will default to using the *.cdf extension which is inherited from another emulator I haven't released yet. Raw binaries are supported, just not the default option in the combo box. Of course, this is all in the help file.


Aside from the lack of TV-Link emulation this is probably the most accurate SuperVision emulator (as of writing). If you're going to huff paint thinner, you may as well do it correctly.

However, the port of Chimera B.I.T.S. did is actually quite well made.

Edit - Of course if anyone wants to donate SuperVision hardware to emulate that is totally cool.
#6
Quote from: Debvgger_ on 05/08/2015, 12:35 PMHow is it going TailChao? :-)
Very well! Around 11pm last night I finally got to see the two screens attached below.
Quite a relief, as the first card I assembled did not work properly (there is likely a bad solder joint somewhere, the TSOP-IIs SRAMs with curled under pins are a little tricky).

This means that it's resource release time, and now I'll be moving forward to manufacturing. Since this will take awhile, and I cannot give a good estimate as to exactly how much, I'll be continuously updating the first post's new "manufacturing tracker" so you can get an idea how things are going.

Before that, though- I'm going to perform a few tests with different speed grade CPLDs and region mods. One concern I have is that the region mod most people use (the one with the analog switches) adds a very large propagation delay, which could cause the card to not work properly. I'll keep you all posted.

Card_Konami.jpg Card_OK.jpg
#7
Picked these up at the post office yesterday.

Looks like everything was fabbed properly. The only immediate mistake is actually my fault (I made the pad rows on the RAM footprint a little too close together, but this isn't anything that will break the cards, just complicate soldering).

Luckily the wait gave me enough time to get my test program finished and fix my Turbo CD (the seek gear finally shredded itself, quite lucky that we're able to order new ones). I'll try and get the first card up and running, passing the test program, and playing Gradius II by May 8th. Then it's time to manufacture everything for you guys.

StupidCards.jpg
#8
Alright, everyone. Layout is completed and it's time for Developer sign-up.
Cards will cost $35/each + shipping and I have listed a component cost breakdown in the first post for those who'd like to manufacture their own cards in the future.

If you're interested in getting a card, please state so AFTER this post (all prior "give me one" posts are ignored). A total of 25 cards are available as first-come first-serve. You may sign up for more than one card.

This sign-up period will be open until April 10th. I will not collect anyone's payment until all cards have been built and tested. Please hold on to your money.

CDStupid.png
#9
Alright, end of the week update-
Attached is the layout status, shouldn't have any issues finishing the routing and dropping on a few more caps by the end of next week.

Edit:
-The large 39F040 is where the BIOS / Whatever ROM'd code you like will be stored. This will be socketed.
-The two LEDs on the top right of the card indicate whether the SWAP and LINEAR modes have been set to simplify debugging.

IMG
#10
As discussed here, there seems to be a desire to create a new CD System Card with extended memory to simplify translation work and generally improve the PCE's capabilities.

Based upon these, I'd like to propose the CD Stupid Card 4.0:
*512KB ROM + 2MB RAM + MCGenjin-CD Mapper.
*Linear 1MB RAM mode for loading all your (legally obtained) HuCard images from CD, or rolling your own CD BIOS, or whatever.
*Works in both the PCE and TG16 without modification.
*Compatible with most CD System Card 3.0 software using a patched version of said card's BIOS.
*Can already be emulated by Mednafen excluding the linear 1MB mode (see "BIOS" section below).
*Two LEDs indicating region locking and mode (512KB ROM + Banked RAM or Linear 1MB RAM).


MCGenjin-CD Mapper:
Code ("MCGenjin-CD Documentation") Select
;*************************************************************
; !!!!----              MCGenjin-CD                ----!!!!
;*************************************************************
  MCGenjin-CD is a modified version of the MCGenjin memory
  mapper for use in CD System Cards. It includes the standard
  dual-region capability present on the original MCGenjin as
  well as facilities for controlling 512KB of cartridge ROM
  and 2MB of cartridge RAM.


;*************************************************************
; !!!!----            MEMORY MAPPING              ----!!!!
;*************************************************************
  In Normal / Startup mode, the 1MB cartridge region is
  arranged as follows:
    $00000 - $3FFFF Lower 256KB of ROM
    $40000 - $7FFFF Upper 256KB of ROM or Secondary 256KB RAM Bank
    $80000 - $BFFFF Selected 256KB RAM Bank
    $C0000 - $FFFFF Highest 256KB RAM Bank
 
  Once RAM mode is enabled, the cartridge region will just
  contain a linear map of the lower 1MB of RAM, and will remain
  in this mode until the console is reset.
    $00000-$FFFFF 1MB RAM


;*************************************************************
; !!!!----            MCGENJIN HEADER            ----!!!!
;*************************************************************
  As the MCGenjin-CD is an MCGenjin derivative mapper, an
  MCGenjin header should be included from $1FD0 to $1FDF in the
  ROM residing on the card. The following contents should be used,
  appearing as follows after being mapped into MPR7/$FFD0:

    $FFD0-$FFD7 : ASCII String containing "MCGENJIN"
    $FFD8 : MCGenjin Chip Revision.
        $CD- "CD" Version
    $FFD9 : Number of 256KB pages in ROM
        $2- 512KB of ROM
    $FFDA : Native ROM Region
        $0- US/EU
        $1- JP
    $FFDB : User Chipselect 0 Device Type
        $15- 256KB SRAM
    $FFDC : User Chipselect 1 Device Type
        $15- 256KB SRAM
    $FFDD-$FFDF : Unused/Future Expansion
        -Set to $0


;*************************************************************
; !!!!----            REGISTER LIST              ----!!!!
;*************************************************************
  All registers are write-only and accessed by writing
  anywhere in the $00000 - $3FFFF region. Register access
  is completely disabled upon a switch into linear RAM mode.
 
  Note that unlike a normal MCGenjin, _only_ the Region Control
  register does not account for the current operating region
  (dataline transposition). All other registers such as the
  RAM Bank Select and Linear Mode Unlock will properly reverse
  written data bits. Therefore, when setting the system region
  at startup it is best just to write $00 for native / unswapped
  or $FF for foriegn / swapping enabled.
 
 
 +Writes to %00 addresses control UPPER ROM ENABLING
                      76543210
    High ROM Enable: xxxxxxxR, Reset = xxxxxxx0
    R = When set, the upper 256KB of ROM from $40000 - $7FFFF
    will be replaced with the LOWER RAM BANK (selected using
    register %01).
    Note that any writes to this register will also reset
    the linear mode unlock sequence.
 
 -Writes to %01 addresses select the LOWER RAM BANK
                      76543210
    RAM Bank Select: xxxxxBBB, Reset = xxxxx000
    BB = A20-A18 of the lower 256KB RAM Bank ($40000 - $7FFFF)
    Note that any writes to this register will also reset
    the linear mode unlock sequence.
 
 +Writes to %10 addresses control REGION and LINEAR MODE
                      76543210
    Region Control:  xxxxxxxS, Reset = xxxxxxx0
    Upon reset, this register controls the system region
    (dataline reversal enable). Once a region has been
    selected (writing '0' for no reversal or '1' to
    request dataline reversal), this register's purpose
    will change to control LINEAR RAM MODE UNLOCKING.
 
                      76543210
    Linear Unlock:  KKKKKKKK
    To request a switch into linear RAM mode, the two ASCII
    characters "HU" must be written to this register in order.
    Once in linear RAM mode, all register access will be
    disabled until the system is reset.
 
 -Writes to %11 addresses select the UPPER RAM BANK
                      76543210
    RAM Bank Select: xxxxxBBB, Reset = xxxxx000
    BB = A20-A18 of the upper 256KB RAM Bank ($80000 - $BFFFF)
    Note that any writes to this register will also reset
    the linear mode unlock sequence.


BIOS:
I have two UPS patches available for the Japanese System Card 3.0 (Original MD5 should be 38179df8f4ac870017db21ebcbf53114). A summary of the patch changes is available here.

* Super CD-ROM DERP v3.6 - Can be used with Mednafen as a System Card 3.0 with 512KB RAM (basically no RAM banking or linear 1MB mode), if you test your game or translation using this it will work 100% fine on the CD Stupid Card.

* Stupid CD-ROM DERP v4.1 - Version for the CD Stupid Card. Not 100% compatible with Mednafen.


Resources to make your OWN CD Stupid Cards:
Are all available here.
These include the board gerbers, mapper source (in Verilog) and precompiled POF, along with documentation and a test program.
If you're planning on mass-producing a variation of this card, I highly recommend laying out a new board. Smaller packages of the components used are available and could easily be arranged such that everything fits in the same area as an original System Card. I also screwed up the SRAM pads which makes manufacturing difficult.


Components and Cost:
1x EPM7032LC44 / CPLD : $2.40 ea
1x 39SF040 / 512KB Flash : $2.07 ea
2x AS6C8008 / 1MB SRAM : $7.24 ea

1x DIP32 Socket : $0.73 ea
2x Amber LED : $0.25 ea
2x 1KOhm Resistor (0402) : $0.07 ea
1x 10uF, 25V Tantalum Capacitor (1206) : $0.21 ea
4x 0.1uF, 50V Ceramic Capacitor (0402) : $0.06 ea

1x PCB : $1.49 ea

Total: $22.26 per card
Please note that it this is raw component cost in low quantities and excludes shipping and manufacturing. However, the point still stands that this card is cheap to make. The developer cards will be available for $35/ea plus shipping.


Yeah great, but where are you going with all this?:
This is the System Card I've wanted since I first bought my TurboGrafx: something affordable which works in both console regions. It also has some neato extra stuff for translations and new games.
That said, I do not have time to manufacture hundreds of these. I'm currently developing two games and working on a book, which have to take priority over weird niche card designs. However, I'd like to do a small "developer's" run of cards and then release all the materials I used to create the cards. This means both the gerber files for the PCB and Verilog + POF for MCGenjin-CD (update, these are available). That way the community can take the card wherever it needs to go.
This developer run of cards will only be 25 cards maximum. If you're interested in a card, please post in this topic saying so. These are first-come first-serve (update, with the current developer sign-up I'll be manufacturing 16 cards total).


What I'd like from you guys:
Nothing! Enjoy your cards!


Status Tracker:
*Card and Mapper Specification, DONE!
*Mapper Verilog, DONE!
*Board Layout, DONE!
*Developer Sign-Up, DONE!
*Developer Card Fab, DONE!
*Card Verification, DONE!
*Card Manufacturing, DONE!
*Developer Distribution, DONE!


Developer Sign-Up:
- MotherGunner
- elmer
- Black Tiger
- Lochlan
- wyndcrosser
- The Old Rover
- VenomMacbeth
- SamIAm
- Bonknuts / Tomaitheous
- cjameslv
- akamichi
...and one for me makes 12 cards! I'll be manufacturing 16 in case of defects.

UPDATE - All cards have been shipped out. If you encounter any issues with your card or have questions, please PM me or post in this topic.


Manufacturing Tracker Archive:
Since I am manufacturing the cards in "components passes" (i.e. solder the RAM on a group of cards, then the CPLDs), progress will be listed by how many cards have passed a given step in production. I cannot give solid estimates as to when all the cards will be done, but you can watch the list below:
- RAM: 16
- CPLD : 16
- Discrete Components : 16
- Flash : 16

- Verified OK : 13
- Defective / Bad Merchandise : 3


This post will be updated as needed.

CDStupid.png
#11
Thanks for the feedback.

Quote from: guest on 11/09/2014, 11:16 AMSo, is this engine compatible with channels being dynamically pulled out for sound effect duty?
Yes, each channel of a music track (if playing) has an assigned priority. All sound effects also have priorities which are used during their dispatch to see if they can "borrow" a channel from the music track if it is in use.

Quote from: ccovell on 11/09/2014, 07:56 PMThis looks great.  So, what's the memory / raster time usage?
40 Bytes ZeroPage and 894 Bytes of RAM. Kind of fat, but I added so much RAM on the cartridge that this is a bit moot. The depth of the loop / call stacks used in the driver can be adjusted from their default of depth four as well which could easily get you a hundred or so bytes off. Same goes for the sound effect dispatch queue (default depth is eight).

Performance is (really really) variable because of the macro instrument setup. The first two attachments show driver time in "average" and "bad" states. RED indicates audio register writes, BLUE is VRAM transfers (ignore), and PINK is the driver update tick. This is something I'd like to improve in the future. CALLs and BREAKs are super expensive since there are no alignment restrictions on music, instruments, or sound effects.

The next two attachments show PCM IRQ time (in pink) for one and two PCM channels in use respectively. While six is supported, playing that many samples at once will definitely mess up any HBL rasters you may be using.

HuSound_Normal.png HuSound_Heavy.png
HuSound_1PCM.png HuSound_2PCM.png